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Bipolar CMOS (BiCMOS) is a semiconductor technology that integrates two semiconductor technologies, those of the bipolar junction transistor and the CMOS (complementary metal–oxide–semiconductor) logic gate, into a single integrated circuit.[1][2] In more recent times the bipolar processes have been extended to include high mobility devices using silicon–germanium junctions.
Bipolar transistors offer high speed, high gain, and low output impedance with relatively high power consumption per device, which are excellent properties for high-frequency analog amplifiers including low noise radio frequency (RF) amplifiers that only use a few active devices, while CMOS technology offers high input impedance and is excellent for constructing large numbers of low-power logic gates. In a BiCMOS process the doping profile and other process features may be tilted to favour either the CMOS or the bipolar devices. For example GlobalFoundries offer a basic 180 nm BiCMOS7WL process and several other BiCMOS processes optimized in various ways.[3] These processes also include steps for the deposition of precision resistors, and high Q RF inductors and capacitors on-chip, which are not needed in a "pure" CMOS logic design.
BiCMOS is aimed at mixed-signal ICs, such as ADCs and complete software radio systems on a chip that need amplifiers, analog power management circuits, and logic gates on chip. BiCMOS has some advantages in providing digital interfaces. BiCMOS circuits use the characteristics of each type of transistor most appropriately. Generally this means that high current circuits such as on chip power regulators use metal–oxide–semiconductor field-effect transistors (MOSFETs) for efficient control, and 'sea of logic' use conventional CMOS structures, while those portions of specialized very high performance circuits such as ECL dividers and LNAs use bipolar devices. Examples include RF oscillators, bandgap-based references and low-noise circuits.[citation needed]
The Pentium, Pentium Pro, and SuperSPARC microprocessors also use BiCMOS.
Disadvantages edit
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Some of the advantages of CMOS fabrication, for example very low cost in mass production, do not transfer directly to BiCMOS fabrication. An inherent difficulty arises from the fact that optimizing both the BJT and MOS components of the process is impossible without adding many extra fabrication steps and consequently increased process cost and reduced yield. Finally, in the area of high performance logic, BiCMOS may never offer as low a power consumption as a foundry process optimized for CMOS alone, due to the potential for higher standby leakage current.
References edit
- ^ Puchner, H. (1996). "5.2 BiCMOS Process Technology". Advanced Process Modeling for VLSI Technology (PhD). Institut für Mikroelektronik, Technischen Universität Wien. TUW-101186.
- ^ Puchner 1996, 5.2.1 BiCMOS Process Flow
- ^ https://www.globalfoundries.com/sites/default/files/sige_hp_pb_2020-0212web.pdf [bare URL PDF]
